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Berkeley Design Automation
Results: 35

#	Item
11	Advanced encoding of programs CS294: Program Synthesis for Everyone Ras Bodik Emina Torlak Division of Computer Science Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2012-09-09 10:02:45 Model theory Electronic design automation Relational model Z3 Unsatisfiable core Logic synthesis First-order logic Transitive closure Finitary relation Logic Mathematics Mathematical logic
12	Berkeley Design Automation Statistical Process Corners for Nm-Scale AMS GSA AMS Working Group November 14, 2012 Add to Reading List Source URL: www.gsaglobal.org Language: English - Date: 2014-01-22 10:43:04 Statistics Measurement Noise Natural process variation Quality control Process corners Effective number of bits Electromagnetism DBc Digital signal processing Electronics Integrated circuits
13	Defeating UCI: Building Stealthy and Malicious Hardware Cynthia Sturton University of California, Berkeley Matthew Hicks Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2015-01-21 19:48:40 Digital electronics Electronic design Electronic design automation Field-programmable gate array Circuit Negated AND gate OR gate Hardware Trojan Electronic engineering Logic gates Design
14	1 Scalable Min-Register Retiming Under Timing and Initializability Constraints Aaron P. Hurst, Alan Mishchenko, and Robert K. Brayton University of California, Berkeley Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-04-03 12:04:29 Formal methods Mathematics Network flow Retiming Electronic design automation Electronic design Maximum flow problem Design closure Clock skew Electronic engineering Operations research Electronics
15	Large-Scale Hardware Simulation: Modeling and Verication Strategies Douglas W. Clark 1 Add to Reading List Source URL: inst.eecs.berkeley.edu Language: English - Date: 2005-08-12 16:55:44 Formal methods Electronic design automation Logic simulation Electronic design Simulation Computer simulation Integrated circuit design Software bug Software development process Electronic engineering Electronics Logic design
16	Scalable Logic Synthesis using a Simple Circuit Structure Alan Mishchenko Robert Brayton EECS Department, University of California, Berkeley, CA 94720 Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-01 19:34:13 Boolean network American International Group Science Economy of New York City Electronics Diagrams And-inverter graph Electronic design automation
17	SAT-Based Complete Don’t-Care Computation for Network Optimization Alan Mishchenko and Robert K. Brayton Department of EECS University of California, Berkeley {alanmi, brayton}@eecs.berkeley.edu Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2004-12-03 17:46:16 Boolean algebra Electronic design automation Formal methods Bioinformatics Boolean network Logic Boolean satisfiability problem Circuit Model checking Theoretical computer science Applied mathematics Mathematics
18	SAT-Based Complete Don’t-Care Computation for Network Optimization Alan Mishchenko Department of EECS University of California, Berkeley [removed] Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2004-04-30 02:47:03 Boolean algebra Computing Formal methods Electronic design automation Boolean satisfiability problem Boolean network Model checking Canonical form Lookup table Theoretical computer science Logic Mathematics
19	Applying Logic Synthesis for Speeding Up SAT Niklas Een, Alan Mishchenko, Niklas S¨ orensson Cadence Berkeley Labs, Berkeley, USA. EECS Department, University of California, Berkeley, USA. Chalmers University of Technol Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-03-20 02:33:25 Theoretical computer science Conjunctive normal form And-inverter graph Science Mathematics Circuit Canonical form Boolean network Logic Electronic design automation Formal methods
20	Scalably-Verifiable Sequential Synthesis Robert Brayton Alan Mishchenko Department of EECS, University of California, Berkeley Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-10-02 14:31:33 Electronic design automation Digital electronics Logic in computer science Electrical circuits And-inverter graph Retiming Automatic test pattern generation Formal verification Combinational logic Electronic engineering Formal methods Theoretical computer science